1. Field of the Invention
The present invention generally relates to computer hardware and more specifically to programmable compute engine screen mapping.
2. Description of the Related Art
The processing power of a modern central processing unit (CPU) may be supplemented using a co-processor, such as a graphics processing unit (GPU). The GPU may perform general processing operations or graphics processing operations on behalf of the CPU. When performing graphics processing operations, the GPU generates digital images that can be output to a display device. When the GPU outputs a digital image to the display device, the display screen displays each pixel of the digital image.
Some GPUs include one or more “general processing clusters” (GPCs) that each outputs pixels associated with different regions of the screen. For example, a GPU could include two GPCs that each outputs pixels associated with different quadrants of the screen. The first GPC could output pixels associated with the upper left and lower right quadrants of the screen, while the second GPC could output pixels associated with the lower left and upper right quadrants of the screen. When a GPC is configured to output pixels associated with a particular screen region, the GPC is “mapped” to that screen region. The mapping between GPCs and screen regions is typically fixed in conventional GPUs.
Each GPC may include one or more “streaming multiprocessors” (SMs) that each generates a portion of the pixels output by the GPC. A given SM within a GPC generates pixels residing within one or more of the screen regions to which the GPC is mapped. For example, the first GPC described in the above example could include two SMs, where the first SM generates pixels residing within the upper left quadrant of the screen and the second SM generates pixels residing within the lower right quadrant of the screen. Additionally, each GPC may dynamically assign SMs included in the GPC to one or more of the screen regions to which the GPC is mapped.
One or more of the SMs within a given GPC may be disabled for various reasons. For example, certain SMs could be disabled due to manufacturing defects. Alternatively, the manufacturer of the GPU could intentionally disable SMs within specific GPCs in order to provide a low-cost version of the GPU having reduced processing power. With a reduced number of enabled SMs, a given GPC has a reduced capacity to generate pixels. Nonetheless, that GPC still must generate pixels residing within the screen regions to which the GPC is mapped based on the fixed mapping. Consequently, any GPC having a sub-normal number of active SMs may become overburdened with processing tasks.
As the foregoing illustrates, what is needed in the art is a more flexible way to map GPCs to specific regions of a display screen.